Product Summary
The IIC41LV16100S-50TG is a 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memory. The IC41LV16100S-50TG offers an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IC41LV16100S-50TG ideal for use in 16-, 32-bit wide data bus systems. These features make the IC41LV16100S-50TG ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
Parametrics
IC41LV16100S-50TG absolute maximum ratings: (1)VT Voltage on Any Pin Relative to GND: -1.0 to +7.0 V; (2)VCC Supply Voltage: -1.0 to +7.0 V; (3)IOUT Output Current: 50 mA; (4)PD Power Dissipation: 1 W; (5)TA Commercial Operation Temperature: 0 to +70 ℃; (6)Industrial Operationg Temperature: -40 to +85 ℃; (7)TSTG Storage Temperature: -55 to +125 ℃.
Features
IC41LV16100S-50TG features: (1)Extended Data-Out (EDO)Page Mode access cycle; (2)TTL compatible inputs and outputs; tristate I/O; (3)Refresh Interval: Refresh Mode: 1,024 cycles /16 ms, RAS-Only, CAS-before-RAS (CBR), and Hidden, Self refresh Mode - 1,024 cycles / 128ms; (4)JEDEC standard pinout; (5)Single power supply: 5V ± 10% (IC41C16100S), 3.3V ± 10% (IC41LV16100S); (6)Byte Write and Byte Read operation via two CAS; (7)Industrail Temperature Range -40℃ to 85℃.
Diagrams
IC41C16100A |
Other |
Data Sheet |
Negotiable |
|
||||||
IC41C16100AS |
Other |
Data Sheet |
Negotiable |
|
||||||
IC41C16100S |
Other |
Data Sheet |
Negotiable |
|
||||||
IC41C16256 |
Other |
Data Sheet |
Negotiable |
|
||||||
IC41C16257 |
Other |
Data Sheet |
Negotiable |
|
||||||
IC41C16257S |
Other |
Data Sheet |
Negotiable |
|